Gate turn on voltage compensating circuit, display panel, driving method and display apparatus
US10121403B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 31, 2016 |
| Grant date | Nov 6, 2018 |
| Priority date | — |
| Expiry date | Oct 3, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/028
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a gate turn on voltage compensating circuit, a display panel, a driving method and a display apparatus thereof. The gate turn on voltage compensating circuit includes a voltage generation module, a clock control module and a chamfering module. The voltage generation module is used for correspondingly outputting generated first voltage signal and second voltage signal to a first voltage input terminal and a second voltage input terminal of the chamfering module; the clock control module is used for controlling the chamfering module to output corresponding chamfered voltage signals in the corresponding time periods, so that the chamfering depths of gate turn on voltage signals input correspondingly to respective gate drive chips in different time periods are different.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.