Semiconductor device having auxiliary patterns
US10121803B2 · kind B2 · utility
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2References
6Claims
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Key dates
| Filing date | May 19, 2017 |
| Grant date | Nov 6, 2018 |
| Priority date | — |
| Expiry date | May 19, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/481
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a first conductive layer on the substrate and including a main pattern, and substantially symmetrical auxiliary patterns extending from two sides of the main pattern, an insulating layer on the substrate and the first conductive layer, and a second conductive layer on the insulating layer and overlapping at least a portion of the main pattern and the auxiliary patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.