Three-dimensional semiconductor nanoheterostructure and method of making same
US10121935B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2013 |
| Grant date | Nov 6, 2018 |
| Priority date | — |
| Expiry date | Jan 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/818
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method for fabrication of three-dimensional nanostructures on top of the surface of a first solid state material is disclosed, which includes steps of (i) deposition of a layer of a second solid state material forming a stable layer-like coverage of the surface, (ii) the subsequent deposition of a third solid state material, having a stronger binding energy with the first solid state material than the second solid state material, (iii) wherein the third solid state material replaces the second solid state material forming an interface with the first material and thus reduces the energy of the system, and (iv) where the resulting excess second solid state material forms three-dimensional nanostructures. The structure can be covered with another (fourth) solid state material, which eventually can be the same as the first material or a different one, and the three dimensional nanostructures form capped quantum dots or quantum wires. The deposition steps can be repeated and extended to provide necessary functionality in the resulting device structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.