Power factor correction circuit
US10122262B1 · kind B1 · utility
3Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2018 |
| Grant date | Nov 6, 2018 |
| Priority date | — |
| Expiry date | Jul 5, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A bridgeless power factor correction (PFC) circuit has first and second nodes, and first and second current paths connected between the first and second nodes. The first current path includes a first semiconductor device and a first switch element, and the second current path includes a second semiconductor device and a second switch element. One of the first and the second current paths further includes first and second sensing elements that are oppositely connected in series.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.