Circuits and methods for detecting interferers
US10122396B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2015 |
| Grant date | Nov 6, 2018 |
| Priority date | — |
| Expiry date | Sep 14, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Mechanisms for interferer detection can detect interferers by detecting elevated signal amplitudes in one or more of a plurality of bins (or bands) in a frequency range between a maximum frequency (fMAX) and a minimum frequency (fMIN). To perform rapid interferer detection, the mechanisms downconvert an input signal x(t) with a local oscillator (LO) to a complex baseband signal xI(t)+jxQ(t). xI(t) and xQ(t) are then multiplied by m unique pseudorandom noise (PN) sequences (e.g., Gold sequences) gm(t) to produce m branch signals for I and m branch signals for Q. The branch signals are then low pass filtered, converted from analog to digital form, and pairwise combined by a pairwise complex combiner. Finally, a support recovery function is used to identify interferers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.