Array substrate, manufacturing method thereof and display device
US10126610B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 21, 2017 |
| Grant date | Nov 13, 2018 |
| Priority date | — |
| Expiry date | Nov 21, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2201/123
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure provides an array substrate, manufacturing method thereof and a display device. A method of manufacturing an array substrate includes: sequentially forming a common electrode line, a first insulating layer, a pixel electrode, and a second insulating layer, and forming a via that is in communication with the common electrode line. The method further comprises, after forming the via, forming a common electrode that covers the via through a patterning process, wherein the patterning process includes etching a portion of the via covered with the common electrode to form an isolated region. The isolated region includes a region at an inner side of a first edge of the via. The first edge is an edge of the via adjacent to or stacked with the pixel electrode. The via further includes a second edge that is neither adjacent to nor stacked with the pixel electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.