Tamper resistant cryptographic algorithm implementation
US10127390B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 27, 2013 |
| Grant date | Nov 13, 2018 |
| Priority date | — |
| Expiry date | Mar 23, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/16
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
There is provided a method of performing a cryptographic algorithm in software, the cryptographic algorithm comprising one or more processing steps, wherein each processing step is arranged to process a respective input to the processing step so as to generate an output corresponding to the input, characterized in that, for each of at least one of the one or more processing steps, the method comprises: providing a respective input for the processing step as an input to a plurality of implementations of the processing step, wherein each implementation is arranged to output a corresponding intermediate result represented using a respective predetermined output representation; and using the representation of the intermediate results to generate a result for the processing step that is based on each of the intermediate results, wherein, if each intermediate result is the output that corresponds to the input for the processing step then the result for the processing step is the output that corresponds to the input for the processing step. Additionally provided is a method of enabling a data processor to perform a cryptographic algorithm in software, the method comprising: generating an …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.