Antifuse structure in via hole in interplayer dielectric
US10128184B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2016 |
| Grant date | Nov 13, 2018 |
| Priority date | — |
| Expiry date | Aug 19, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53261
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An antifuse structure includes a first electrode layer, an inter-metal dielectric layer over the first electrode layer, and a via in the inter-metal dielectric layer. The via penetrates through the inter-metal dielectric layer exposing a portion of the first electrode layer. An antifuse layer is deposited in the via and over the portion of the first electrode layer. A second electrode is disposed in the via and over the antifuse layer. An interconnect layer may be deposited over the inter-metal dielectric layer and in electrical contact with the second electrode in the via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.