Array substrate, fabrication method thereof and display device
US10128281B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 5, 2014 |
| Grant date | Nov 13, 2018 |
| Priority date | — |
| Expiry date | Sep 5, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/1368
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A fabrication method includes preparing a base substrate, the base substrate including a pixel region and a region of gate on array (GOA); forming a pattern including a gate electrode and a pattern of an active layer on the base substrate, and forming a gate lead on the region of GOA, by a first patterning process; forming a pattern of a gate insulating layer by a second patterning process; forming a pattern including a source/drain electrode by a third patterning process; forming a pattern of a planarization layer by a fourth patterning layer; and forming a pattern including a pixel electrode by a fifth patterning layer. Here, the pattern including the gate electrode and the pattern including the active layer are formed by one patterning process, which can reduce the number of masks in the fabrication process of the array substrate, improve production efficiency and save the cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.