Double gate trench power transistor and manufacturing method thereof
US10128368B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2016 |
| Grant date | Nov 13, 2018 |
| Priority date | — |
| Expiry date | Aug 21, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
Abstract
A double gate trench power transistor and manufacturing method thereof are provided. The double gate trench power transistor gate structure includes an epitaxial layer, a trench structure formed in the epitaxial layer, at least two gate structures, and a shielding electrode structure. The trench structure includes a deep trench portion and two shallow trench portions respectively adjacent to two opposite sides of the deep trench portion. Each of the gate structures formed in each of the shallow trench portions includes a gate insulating layer and a gate electrode. The gate insulating layer has a first dielectric layer, a second dielectric layer and a third dielectric layer. The second dielectric layer is interposed between the first and third dielectric layers. Additionally, a portion of the gate insulating layer is in contact with a shielding dielectric layer of the shielding electrode structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.