High efficiency flicker attenuator for lighting
US10129939B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2017 |
| Grant date | Nov 13, 2018 |
| Priority date | — |
| Expiry date | Jul 10, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B20/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Systems, devices, and methods for dimming of solid state lighting reduce ripple and flicker at low load dimming levels (low LED current, lower light levels) yet provide full power to the load at high load dimming levels (high LED current, higher light levels) thereby reducing power loss compared to conventional dimming techniques. When dimming to lower light levels a flicker resisting metal oxide semiconductor field effect transistor (MOSFET) connected to the LED operates in linear mode such that the relationship of its drain-source voltage to the LED current is resistive to provide flicker reduction. Conversely, at higher light levels the flicker resisting MOSFET is operated in saturation mode such that full power is supplied to the LED as flicker reduction is less needed. The disclosed techniques also reduce undershoot and overshoot of the LED voltage during transitions in dimming control from high to low and low to high respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.