Eliminating redundancy when generating intermediate representation code
US10133777B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2015 |
| Grant date | Nov 20, 2018 |
| Priority date | — |
| Expiry date | Dec 5, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/43
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are system, method, and computer program product embodiments for eliminating redundancy when generating intermediate representation code. An embodiment operates by traversing a query execution plan, and for at least one operator in the query execution plan, determining whether the operator is derived from a parent class operator. If it is determined that the operator is derived from the parent class operator, source code for the native access plan is generated using one or more code generator functions corresponding to the parent class operator and/or one or more generator functions specifically corresponding to the child class operator. If it is determined that the operator is not derived from the parent class operator, source code for the native access plan is generated using one or more code generator functions corresponding to the operator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.