Patent · US Active

Hybrid memory architectures

US10134471B2 · kind B2 · utility

3Cited by
11References
8Claims
0Family size

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Key dates

Filing dateNov 12, 2014
Grant dateNov 20, 2018
Priority date
Expiry dateNov 12, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2207/2245
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods and apparatuses for providing a hybrid memory module having both volatile and non-volatile memories to replace a DDR channel in a processing system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.