Patent · US Active

Shallow trench isolation structure and fabricating method thereof

US10134625B2 · kind B2 · utility

0Cited by
1References
20Claims
0Family size

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Key dates

Filing dateAug 26, 2016
Grant dateNov 20, 2018
Priority date
Expiry dateAug 26, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/31116
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

In accordance with various embodiments of the disclosed subject matter, a shallow trench isolation structure and a fabricating method thereof are provided. The method for forming the shallow trench isolation structure may include: providing a semiconductor substrate; forming a shallow trench in the semiconductor substrate; forming a first insulating layer on a surface of the semiconductor substrate and in the shallow trench, a portion of the first insulating layer in the shallow trench includes an opening; etching the first insulating layer to increase a width of the opening; after etching the first insulating layer, performing a plasma treatment to an exposed surface of the first insulating layer; after the plasma treatment, cleaning the surface of the first insulating layer; and after cleaning the surface of the first insulating layer, filling a second insulating layer into the shallow trench.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.