Digital ground-fault circuit interrupter
US10135235B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2015 |
| Grant date | Nov 20, 2018 |
| Priority date | — |
| Expiry date | Dec 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H5/105
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A GFCI circuit that includes an electronically controllable main switch that can turn on, and turn off, the delivery of electrical power from the GFCI circuit. The main switch is controlled and monitored by a microcontroller unit using at least digital input and digital output signals, and which includes analog to digital converter. The microcontroller unit may also use the on-off functionality of the main switch in connection with repeatable detection of miswiring of the GFCI circuit. The GFCI circuit can further be adapted to conduct a self-test that can temporarily disable the ability of a trip signal generated by a GFCI integrated circuit in response to a test fault to cause the tripping of the main switch. The microcontroller unit further monitors one or more characteristics of the GFCI circuit, including the main switch and trip signal(s), and can determine whether the GFCI circuit has reached its end-of-life stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.