Multiplexers
US10135600B2 · kind B2 · utility
0Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2017 |
| Grant date | Nov 20, 2018 |
| Priority date | — |
| Expiry date | Mar 12, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M9/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
There is disclosed herein multiplexer circuitry. In particular, there is disclosed a latch circuit for use as a multiplexer to multiplex information carried by respective pairs of input information signals onto an output information signal, each pair of input information signals comprising a first input information signal and a second input information signal, and each pair of input information signals carrying information values based on signal values of those input information signals and interleaved with information values carried by the other pair or pairs of input information signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.