Equalizer optimization for FEC-protected communication links
US10135645B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2017 |
| Grant date | Nov 20, 2018 |
| Priority date | — |
| Expiry date | Oct 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03611
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method is disclosed for configuring equalization circuitry of a communication device. The method comprises determining, for a predefined first value of a tap weight of a decision feedback equalizer (DFE) of the equalization circuitry, whether a predefined error propagation condition occurs. The method further comprises iteratively updating the tap weight according to a predefined scheme, wherein each update of the tap weight occurs responsive to determining that the predefined error propagation condition occurs for a current value of the tap weight. The method further comprises ceasing the updating of the tap weight responsive to determining a difference between two adjacent values of the tap weight is less than a predefined resolution limit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.