Signal pin arrangement for multi-device power module
US10137789B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2016 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Aug 10, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02T10/70
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A power module provides one or more power transistors and support elements in a card shape. The pins/terminals for signal-level input/outputs (e.g., gate drive, current sensor, and temperature sensor signals) are arranged in two parallel layers. The power terminals (e.g., positive and negative bus, and output junction of a phase leg) are preferably arranged in just one of the layers. The signal pins are spaced both laterally across a long edge of the power module and transversely to the edge direction, so that the minimum spacings (i.e., clearances) can be achieved while shortening the lateral length of the edge(s) of the power module. Preferably, the signal pins belonging to an individual power transistor (e.g., an IGBT or MOSFET) are distributed between the two layers so that corresponding signal loops can be magnetically decoupled from the power terminal loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.