Memory system including a nonvolatile memory and a volatile memory, and processing method using the memory system
US10140060B2 · kind B2 · utility
2Cited by
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16Claims
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Key dates
| Filing date | Jul 8, 2016 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Jul 8, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/214
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system having multiple memory layers includes a first memory layer comprising a volatile memory, a second memory layer comprising a first sub-memory and a second sub-memory. In response to a reference failure that occurred in the first memory layer, to which a read reference failed data and a write reference failed data are respectively loaded from lower level memory layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.