Caching method of graphic processing unit
US10140681B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2017 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Aug 1, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a caching method of multi-core graphic processing unit (GPU) for improving image processing performance by efficiently storing video data into the cache memory out of the global memory. One aspect of the present invention is to provide a caching method of graphic processing unit (GPU) having multiple cores wherein at least a part of pixels out of A*B pixels of video data are cached into a cache memory in order to perform image processing on k pixels of N*N size (where, k, N, A and B are natural numbers; k=N*N; A>N; B>N), the method comprising: grouping the at least a part of pixels out of A*B pixels into k pixel groups; mapping the k pixel groups to k cores of the GPU one-to-one basis by utilizing index information of each of the k pixels; and storing video data of the k pixel groups in the cache memory with reference to the mapping result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.