Static random access memory
US10141047B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 20, 2016 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | May 29, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static random access memory (SRAM) comprises a plurality of memory cells each having a pair of cross-coupled inverters, a first of the inverters being supplied by first and second power supply rails and a second of the inverters being supplied by third and fourth supply rails, an input of the second inverter being coupled to a first bit line via a first transistor; and a power supply circuit adapted to apply a first voltage difference across the first and second power supply rails and a second voltage difference across the third and fourth power supply rails, the second voltage difference being greater than the first voltage difference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.