Integrated device comprising device level cells with variable sizes for heat dissipation around hotspots
US10141297B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2017 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Dec 4, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/907
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated device that includes a substrate, a device level layer formed over the substrate, and interconnect portion over the device level layer. The device level layer includes a plurality of first device level cells, each first device level cell comprising a first configuration. The device level layer includes a plurality of second device level cells. At least one second device level cell includes a second configuration that is different than the first configuration. The plurality of second device level cells is located over at least one region of the integrated device comprising at least one hotspot.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.