Array substrate and display device
US10141347B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 26, 2016 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Aug 26, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/441
Abstract
Disclosed are an array substrate and a display device. The array substrate comprises a plurality of first data lines (1) parallel to a short side of the array substrate, a plurality of second data lines (2) parallel to a long side of the array substrate, a first integrated circuit (3) arranged in a short-side frame. The plurality of the second data lines (2) are configured for connecting the first integrated circuit (3) with the plurality of the first data lines (1), and the first integrated circuit (3) transmits data signal to the plurality of first data lines (1) through the plurality of second data lines (2). The first integrated circuit for transmitting signals to the data lines is arranged in the short-side frame, so that there is no more integrated circuit arranged in the long-side frame, thereby reducing the border-width of the long-side frame and increasing the visual effect for the viewer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.