Vertical gate guard ring for single photon avalanche diode pitch minimization
US10141458B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2016 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Dec 17, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F77/959
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A photon detection device includes a single photon avalanche diode (SPAD) including a multiplication junction defined at an interface between n doped and p doped layers of the SPAD in a first region of a semiconductor layer. A vertical gate structure surrounds the SPAD in the semiconductor layer to isolate the SPAD in the first region from a second region of the semiconductor layer on an opposite side of the vertical gate structure. The SPAD laterally extends within the first region of semiconductor layer to the vertical gate structure. An inversion layer is generated in the SPAD around a perimeter of the SPAD proximate to the vertical gate structure in response to a gate bias voltage coupled to the vertical gate structure. The inversion layer isolates the SPAD from the second region of the semiconductor layer on the opposite side of the vertical gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.