Thin film transistor and manufacturing method thereof, array substrate, and display apparatus
US10141530B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 5, 2015 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Nov 5, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K2102/00
Abstract
This invention provides a thin film transistor and a manufacturing method thereof, an array substrate, and a display apparatus. This thin film transistor comprises an organic semiconductor layer and a source drain electrode layer, and further comprises a metal oxide insulating layer, wherein the metal oxide insulating layer is provided between the organic semiconductor layer and the source drain electrode layer and has a work function higher than that of the source drain electrode layer. In the thin film transistor provided by this invention, the metal oxide insulating layer having a higher work function can generate an interface dipole barrier so as to reduce the difficulty for the carriers in the source drain electrode to enter the organic semiconductor layer and thereby it is possible to decrease the contact resistance between the source drain electrode layer and the semiconductor layer and improve electrical properties of the thin film transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.