Solid state memory thermal regulation
US10146279B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 31, 2016 |
| Grant date | Dec 4, 2018 |
| Priority date | — |
| Expiry date | Feb 4, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A chassis for a storage system contains a digital chamber that houses conventional electronic components and a thermal chamber that houses non-volatile solid state memory such as flash memory. A temperature regulating system monitors temperature within the digital chamber to keep the components therein below their maximum junction temperature. The temperature regulating system tightly regulates the temperature of solid state memory chips to within a nominal operating temperature range selected to extend the lifetime and/or improve the endurance and reliability of the solid state memory. The temperature regulating system may regulate different memory chips to different nominal temperatures based on the operations being performed and lifetime factors for the memory chips including current health and prior use.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.