Controlling power delivery to a processor via a bypass
US10146283B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2017 |
| Grant date | Dec 4, 2018 |
| Priority date | — |
| Expiry date | Nov 6, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.