Automated system-level failure and recovery
US10146653B2 · kind B2 · utility
5Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2016 |
| Grant date | Dec 4, 2018 |
| Priority date | — |
| Expiry date | Dec 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/263
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for automated system-level failure and recovery are described. In some embodiments, an Information Handling System (IHS) includes a processor and a memory, the memory having program instructions stored thereon that, upon execution by the processor, cause the IHS to execute a selected process configured to participate in an inter-process communication (IPC) with at least one other process, invoke an error handling process by simulating a fault in the IPC, and determine if the error handling process successfully handles the fault.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.