Transistor with shield structure, packaged device, and method of manufacture
US10147686B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2017 |
| Grant date | Dec 4, 2018 |
| Priority date | — |
| Expiry date | Sep 26, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/127
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor includes a semiconductor substrate having an intrinsic active device, a first terminal, and a second terminal. The transistor also includes an interconnect structure formed of layers of dielectric material and electrically conductive material on the semiconductor substrate. The interconnect structure includes a pillar, a tap interconnect, and a shield structure positioned between the pillar and the tap interconnect formed from the electrically conductive material and extending through the dielectric material. The pillar contacts the first terminal and connects to a first runner. The tap interconnect contacts the second terminal and connects to a second runner. The shield structure includes a base segment, a first leg, and a second leg extending from opposing ends of the base segment, wherein the first and second legs extend from opposing ends of the base segment in a direction that is antiparallel to a length of the base segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.