Transistors with dissimilar square waffle gate patterns

US10147796B1 · kind B1 · utility

Assignee

• STMicroelectronics Design & Application S.R.O. · CZ

Inventors

• Patrik Vacula · Brno, CZ
• Milos Vacula · Humenné, SK
• Vlastimil Kote · Bechlín, CZ
• Adam Kubacak · Praha, CZ
• Milan Lzicar · Jinočany, CZ

Key dates

• Filing date: May 26, 2017
• Grant date: Dec 4, 2018
• Expiry date: May 26, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/015

Abstract

The present disclosure is directed to a plurality of waffle gate parallel transistors having a shared gate on a surface of a semiconductor substrate. The shared gate has connected channels that form a plurality of squares, lines of each of the squares over the perimeter of a respective source or drain region of the plurality of waffle gate parallel transistors. The shared gate includes squares of a first size and shape and a second size and shape. The squares having the first size and shape are each over a respective source region and the squares having the second size and shape are each over a respective drain region. Each of the squares having a first size and shape share at least one side with one of the squares having the second size and shape.