Duty cycle estimator for a switch mode power supply
US10148174B2 · kind B2 · utility
0Cited by
4References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2016 |
| Grant date | Dec 4, 2018 |
| Priority date | — |
| Expiry date | Apr 15, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A duty cycle estimation circuit includes a latch circuit that receives a clock signal for a voltage regulator. The latch circuit outputs a duty cycle estimate. The duty cycle estimation circuit also includes a low pass filter coupled to an output of the latch circuit to receive the duty cycle estimate. The duty cycle estimation circuit further includes a comparator that receives, as input, an output of the low pass filter and a voltage regulator output. The comparator feeds back a feedback signal to the latch circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.