Amplifier circuit and multipath nested miller amplifier circuit
US10148238B2 · kind B2 · utility
0Cited by
6References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 30, 2017 |
| Grant date | Dec 4, 2018 |
| Priority date | — |
| Expiry date | Jun 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45512
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided are an amplifier circuit capable of reducing DC offset voltage without an increase in chip area and degradation in frequency characteristics, and a multipath nested miller amplifier circuit. The amplifier circuit includes a chopper switching circuit, a sampling circuit configured to sample an output signal from the chopper switching circuit, and a holding circuit configured to hold a signal output from the sampling circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.