Patent · US Active

Sigma-delta analog-to-digital converter including loop filter having components for feedback digital-to-analog converter correction

US10148278B2 · kind B2 · utility

3Cited by

5References

20Claims

0Family size

Assignee

Intel IP Corporation · US

Inventors

Marco Bresciani · Villach, AT
John G. Kauffman · Munich, DE
Udo Schuetz · Munich, DE
Patrick Torta · Villach, AT
Francesco Conzatti · Villach, AT

Key dates

Filing date	Jan 5, 2018
Grant date	Dec 4, 2018
Priority date	—
Expiry date	Jan 5, 2038

Classification

Technology area (CPC H)Electricity
CPC primaryH03F2203/45616
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

Some embodiments include apparatus and methods using an integrator in a loop filter of a sigma-delta analog-to-digital converter (ADC), a digital-to-analog converter (DAC) located on a feedback path of the ADC, the DAC including output nodes coupled to input nodes of the integrator, and a comparator including input nodes to receive signals from output nodes of the integrator, and an output node to provide information during calibration of the DAC.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.