Receiver to process a load modulated analog input signal
US10148475B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 4, 2016 |
| Grant date | Dec 4, 2018 |
| Priority date | — |
| Expiry date | Nov 4, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/30
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A receiver receives a load modulated analog input signal and outputs digital data detected in the input signal. An in-phase correlator and a quadrature-phase correlator for each of an in-phase component and an quadrature-phase component correlate the in-phase component and the quadrature-component with an in-phase component and a quadrature-phase component of a subcarrier or code clock frequency of the input signal. A combiner combines four output signals of the two in-phase correlators and the two quadrature-phase correlators. A slicer samples an output signal of the combiner at maximum energy levels to output the digital data detected in the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.