System and method for supporting SMA level handling to ensure subnet integrity in a high performance computing environment
US10148567B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 2017 |
| Grant date | Dec 4, 2018 |
| Priority date | — |
| Expiry date | Jun 8, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2101/668
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and methods for supporting SMA level handling to ensure subnet integrity in a high performance computing environment. In accordance with an embodiment, in order to ensure subnet integrity, a SMA at an entry port can operate such that all incoming packets are forwarded to an embedded processor (firmware) no matter where the packet is addressed. Each incoming packet can thus be filtered by an embedded processor. If the packet is valid (for example, includes a second receiver flag and is addressed appropriately), the packet can be allowed. However, if some portion of the validation fails, the packet can be dropped before being allowed entry into the subnet, thus ensuring the integrity of the subnet from erroneous and/or dangerous packets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.