Power manager with a power switch arbitrator
US10152112B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2016 |
| Grant date | Dec 11, 2018 |
| Priority date | — |
| Expiry date | Nov 7, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An arbitrator governs an arbitration between different power domains and sequences powering up the different power domains supplied by the same voltage supply (VS) circuit on the Chip. The arbitrator has sequencing logic that limits how many different power domains simultaneously power up to a maximum amount, which is less than enough instantaneous electrical current drawn on the VS-circuit to cause a reduction below a minimum allowable supply voltage level for the VS-circuit. The sequencing logic manages the sequencing of powering up the different power domains by factoring in i) whether different power domains arbitrating to power up are part of a set of power domains that share the VS-circuit, ii) an amount of an instantaneous electrical current drawn, and iii) an amount of credits available before the minimum allowable supply voltage level occurs for that VS-circuit. The sequencing logic controls a behavior of the power domains when powering up from multiple different behaviors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.