Constraint based bit-stream compression in hardware for programmable devices
US10152566B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2016 |
| Grant date | Dec 11, 2018 |
| Priority date | — |
| Expiry date | Dec 24, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17736
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable logic device such as an integrated circuit may receive user-defined configuration data from a circuit design system. The user-defined configuration data may include a minimal number of user-defined configuration variables necessary to configure the programmable logic device when combined with hardware-defined configuration variables generated in resolution engines in the programmable logic device based on the user-defined configuration variables. The resolution engines may process multiple hardware-defined configuration variables simultaneously and in parallel. A temporary storage device in the programmable logic device may store the user-defined configuration variables, the hardware-defined configuration variables, and preloaded configuration data. The resolution engines may generate a configuration bitstream to configure a configuration random access memory on the device using the configuration data stored on the temporary storage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.