Integrated circuit for a stable electrical connection and manufacturing method thereof
US10153193B2 · kind B2 · utility
1Cited by
0References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2017 |
| Grant date | Dec 11, 2018 |
| Priority date | — |
| Expiry date | Jun 14, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/13671
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a substrate, a pad electrode disposed on the substrate, and a passivation layer disposed on the pad electrode and including an organic insulating material. The integrated circuit further includes a bump electrode disposed on the passivation layer and connected to the pad electrode through a contact hole. The passivation layer includes an insulating portion having a first thickness and covering an adjacent edge region of the pad electrode and the substrate, and a bump portion having a second thickness, that is greater than the first thickness, and covering a center portion of the pad electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.