Transistor having high electron mobility and method of its manufacture
US10153363B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2016 |
| Grant date | Dec 11, 2018 |
| Priority date | — |
| Expiry date | Apr 27, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/411
Abstract
A method for manufacturing a transistor having high electron mobility, encompassing a substrate having a heterostructure, in particular an AlGaN/GaN heterostructure, having the steps of: generation of a gate electrode by patterning a semiconductor layer that is applied onto the heterostructure, the semiconductor layer encompassing, in particular, polysilicon; application of a passivating layer onto the semiconductor layer; formation of drain regions and source regions by generation of first vertical openings that extend at least into the heterostructure; generation of ohmic contacts in the drain regions and in the source regions by partly filling the first vertical openings with a first metal at least to the height of the passivating layer; and application of a second metal layer onto the ohmic contacts, the second metal layer projecting beyond the passivating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.