Cognitive architecture for wideband, low-power, real-time signal denoising
US10153806B1 · kind B1 · utility
15Cited by
3References
17Claims
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Key dates
| Filing date | Mar 7, 2017 |
| Grant date | Dec 11, 2018 |
| Priority date | — |
| Expiry date | Mar 7, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/71632
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described is a cognitive signal processor that can denoise an input signal that contains a mixture of waveforms over a large bandwidth. Delay-embedded mixture signals are generated from a mixture of input signals. The delay-embedded mixture signals are mapped with a reservoir computer to reservoir states of a dynamical reservoir having output layer weights. The output layer weights are adapted based on short-time linear prediction. Finally, a denoised output of the mixture of input signals is generated.
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