Patent · US Active

Operating system-managed interrupt steering in multiprocessor systems

US10157155B2 · kind B2 · utility

1Cited by
16References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 19, 2016
Grant dateDec 18, 2018
Priority date
Expiry dateDec 4, 2036

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An operating system includes an interrupt router that dynamically steers each interrupt to one or more processors within set of processors based on overall load information from the set of processors. An interrupt source is assigned to a processor based on the load imposed by the interrupt source and the target overall load for the processor. For example, each processor can maintain information about each interrupt it processes over time. The operating system receives this historical load information to determine an expected load for interrupts of a given type from a given device, an overall load on the system, and a target load for each processor. Given a set of interrupt sources, their expected loads, and target load for each processor, each interrupt source can be assigned dynamically to a processor during runtime of the system. These assignments can be changed given current operating conditions of the system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.