Technologies for object-oriented memory management with extended segmentation
US10157277B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2016 |
| Grant date | Dec 18, 2018 |
| Priority date | — |
| Expiry date | Feb 4, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2113
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technologies for memory management with memory protection extension include a computing device having a processor with one or more protection extensions. The processor may load a logical address including a segment base, effective limit, and effective address and generate a linear address as a function of the logical address with the effective limit as a mask. The processor may switch to a new task described by a task state segment extension. The task state extension may specify a low-latency segmentation mode. The processor may prohibit access to a descriptor in a local descriptor table with a descriptor privilege level lower than the current privilege level of the processor. The computing device may load a secure enclave using secure enclave support of the processor. The secure enclave may load an unsandbox and a sandboxed application in a user privilege level of the processor. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.