Fan-out semiconductor package
US10157851B2 · kind B2 · utility
3Cited by
1References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2017 |
| Grant date | Dec 18, 2018 |
| Priority date | — |
| Expiry date | Aug 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a fan-out semiconductor package in which a plurality of semiconductor chips are stacked and packaged, and are disposed in a special form to be thus electrically connected to a redistribution layer of a connection member through vias rather than wires. The fan-out semiconductor package can further include a connection member having a through-hole, and at least one of the semiconductor chips can be disposed in the through-hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.