Structure and formation method of semiconductor device structure with well regions
US10157981B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2017 |
| Grant date | Dec 18, 2018 |
| Priority date | — |
| Expiry date | Jul 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a substrate, a first conductive type well region in the substrate, and a second conductive type well region in the substrate. The first conductive type is different from the second conductive type. The first conductive type well region partially overlaps the second conductive type well region in an overlapping region. The semiconductor device structure also includes a source portion in the first conductive type well region and a drain portion in the second conductive type well region. The semiconductor device structure further includes a gate structure over the substrate and the overlapping region, and between the source portion and the drain portion. The semiconductor device structure further includes a first conductive type doping region in the first conductive type well region and the overlapping region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.