MEMS device and process for RF and low resistance applications
US10160635B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2017 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Apr 3, 2037 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2201/019
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
MEMS device for low resistance applications are disclosed. In a first aspect, the MEMS device comprises a MEMS wafer including a handle wafer with one or more cavities containing a first surface and a second surface and an insulating layer deposited on the second surface of the handle wafer. The MEMS device also includes a device layer having a third and fourth surface, the third surface bonded to the insulating layer of the second surface of handle wafer; and a metal conductive layer on the fourth surface. The MEMS device also includes CMOS wafer bonded to the MEMS wafer. The CMOS wafer includes at least one metal electrode, such that an electrical connection is formed between the at least one metal electrode and at least a portion of the metal conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.