Molded lead frame package with embedded die
US10160637B2 · kind B2 · utility
0Cited by
7References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2014 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Apr 2, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04R2201/003
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor package. The semiconductor package includes a first side, a second side, a molded substrate, a die, and a lead frame. The second side of the semiconductor package is opposite the first side of the semiconductor package. The die and lead frame are embedded into the molded substrate. The lead frame is also positioned between the first side and the second side of the semiconductor package to provide a first electrical connection between the first side and the second side of the semiconductor package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.