Ultra high resolution liquid crystal display
US10162207B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2017 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Oct 31, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2202/104
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure relates to an ultra high resolution liquid crystal display having a compensation thin film transistor. The present disclosure provides an ultra high density liquid crystal display comprising: a gate line on a substrate; a first gate insulating layer on the gate line; a first semiconductor layer crossing the gate line on the first gate insulating layer; a second gate insulating layer on the first semiconductor layer; a second semiconductor layer crossing the gate line on the second gate insulating layer; an intermediate insulating layer on the second semiconductor layer; a data line connected to the first semiconductor layer on the intermediate insulating layer; and a drain electrode connected to the second semiconductor layer on the intermediate insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.