Array substrate, display panel and display device
US10162450B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 10, 2015 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Jun 8, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2203/04112
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An array substrate includes a plurality of data lines; a plurality of scanning lines intersecting the data lines to define pixel units; a plurality of pixel electrodes within the pixel units; and a plurality of touch electrodes having a grid shape and formed by a plurality of first sub-electrodes and a plurality of second sub-electrodes intersecting each other. Projections of the first sub-electrodes and the second sub-electrodes onto a layer containing the pixel electrodes are respectively located between adjacent pixel electrodes, or the first sub-electrodes and the second sub-electrodes are respectively located between adjacent pixel electrodes. The product of the resistance of the touch electrode and the load capacitance between the touch electrode, the source electrode and the first metal is reduced, which reduces the charging time of the touch driving signal and enables the touch state and the display state to operate in a time division manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.