Secure computing system
US10162975B2 · kind B2 · utility
13Cited by
1References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 18, 2017 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Sep 18, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/78
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system with multiple security levels, the system comprising a high-power processing device (130), a low-power processing device (110), and an interface unit (120) comprising functions for moving classified information between the high-power device (130) and the low-power device (110) according to formal rules for confidentiality and/or integrity. Additional security aspects, e.g. availability, may readily be accommodated. A method for implementing multiple levels of security along a number of independent security axes on the system is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.