System and method for atomic persistence in storage class memory
US10163510B1 · kind B1 · utility
Inventors
Key dates
| Filing date | Aug 11, 2014 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Aug 11, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Emerging byte-addressable persistent memory technologies, generically referred to as Storage Class Memory, offer performance advantages and access similar to Dynamic Random Access Memory while having the persistence of disk. Unifying storage and memory into a memory tier that can be accessed directly requires additional burden to ensure that groups of memory operations to persistent or nonvolatile memory locations are performed sequentially, atomically, and not caught in the cache hierarchy.The present invention provides a lightweight solution for the atomicity and durability of write operations to nonvolatile memory, while simultaneously supporting fast paths through the cache hierarchy to memory. The invention includes a hardware-supported solution with modifications to the memory hierarchy comprising a victim cache and additional memory controller logic. The invention also includes a software only method and system that provides atomic persistence to nonvolatile memory using a software alias in DRAM and log in nonvolatile memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.